Seventh INFN International School on: "Architectures, tools and methodologies for developing efficient large scale scientific computing applications" ESC15 - Bertinoro (Forlì-Cesena) Italy 25-31 October 2015

Europe/Rome
Bertinoro

Bertinoro

Additional information
    • Registration and Welcome
    • 20:30
      Welcome Dinner
    • Session 1
      • 1
        Welcome and introduction
        Speaker: Mauro Morandin (INFN - Padova)
        Slides
      • 2
        Computer Architecture evolution and the performance challenge
        Speaker: Vincenzo Innocente (CERN)
        Slides
      • 10:30
        Coffee break
      • 3
        Computer Architecture evolution and the performance challenge
        Speaker: Vincenzo Innocente (CERN)
      • 4
        Hands-on environment checkout
        Speakers: Dr Francesco Giacomini (CNAF), Giulio Eulisse (CERN)
        github exercise site
      • 12:30
        Lunch break
      • 5
        Efficient C++ coding
        Speaker: Dr Francesco Giacomini (CNAF)
        Slides
      • 6
        Efficiency C++ coding
        Speaker: Dr Francesco Giacomini (CNAF)
      • 15:30
        Coffee break
      • 7
        C++ Hands-on
        Speaker: Dr Francesco Giacomini (CNAF)
      • 8
        Consolidation
      • 9
        Students lightning presentations
        Slides
    • 20:30
      Dinner
    • Session 2
      • 10
        Efficient C++ coding
        Speaker: Dr Francesco Giacomini (CNAF)
      • 11
        Efficient C++ coding
        Speaker: Dr Francesco Giacomini (CNAF)
      • 10:00
        Coffee break
      • 12
        Efficient Memory management
        Speaker: Giulio Eulisse (CERN)
        Slides
      • 13
        Efficient Memory management
        Speaker: Giulio Eulisse (CERN)
      • 14
        Consolidation
      • 13:30
        Lunch break
      • 15
        Introduction to parallel computing (basic concepts)
        Speaker: Dr Tim Mattson (Intel)
        Slides
      • 16
        Introduction to parallel computing with OpenMP
        Speaker: Dr Tim Mattson (Intel)
        Slides
      • 16:30
        Coffee break
      • 17
        Parallel Performance concepts using OpenMP
        Speaker: Dr Tim Mattson (Intel)
      • 18
        Students lightning presentations
        Slides
    • 20:30
      Dinner
    • Session 3
      • 19
        Efficient Memory management
        Speaker: Giulio Eulisse (CERN)
      • 20
        Efficient Memory management
        Speaker: Giulio Eulisse (CERN)
      • 10:00
        Coffee break
      • 21
        A "Hands-on" introduction to OpenMP
        Speaker: Dr Tim Mattson (Intel)
      • 22
        A "Hands-on" introduction to OpenMP
        Speaker: Dr Tim Mattson (Intel)
      • 23
        Consolidation
      • 13:30
        Lunch break
      • 24
        Working with OpenMP: Performance Optimization
        Speaker: Dr Tim Mattson (Intel)
      • 25
        Working with OpenMP: Debugging Applications
        Speaker: Dr Tim Mattson (Intel)
      • 16:30
        Coffee break
      • 26
        Consolidation
      • 27
        Evening Lecture: "Are we going back to the RISC era?"
        The computer industry typically moves forwards in spirals with hardware or software moving from being deprecated (and even being laughed at) to being the hottest feature imaginable. Think of virtualization as an example. It existed on IBM mainframes already more than 30 years ago. The speaker will debate whether the "world" is interested in spiralling back to multivendor hardware solutions like we had in the 90s with multiple RISC-vendors competing ferociously in the desktop/server space. Although the speaker has been involved in the field for more than 40 years he will give no guarantees as to predicting the future!
        Speaker: Mr Sverre Jarp (CERN)
        Slides
    • 20:00
      Social dinner

      Bistrot Restaurant (Bertinoro)

    • Session 4
      • 28
        Floating point computing efficiency
        Speaker: Vincenzo Innocente (CERN)
        Slides
      • 29
        Floating point computing efficiency
        Speaker: Vincenzo Innocente (CERN)
        exercises
      • 10:00
        Coffee break
      • 30
        Vectorization
        Speaker: Vincenzo Innocente (CERN)
        exercises
      • 31
        GPUs and the Heterogeneous programming problem
        Speaker: Dr Tim Mattson (Intel)
        Slides
      • 32
        Consolidation
      • 13:30
        Lunch
      • 33
        GPU programming with OpenCL: Core Ideas and the host program
        Speaker: Dr Tim Mattson (Intel)
        Slides
      • 34
        Consolidation
      • 17:15
        Coffee break
      • 35
        Consolidation
      • 36
        Evening lecture: "Low-power computing with System-on-Chips"
        The embedded and high-performance computing sectors have in the past been very isolated and unaware of each other’s needs and technologies. Similar isolations have occurred between HPC and the mobile/tablets commodity markets. We are now experiencing a very important convergence between markets, both in constraints and needs as well as in technologies. High computational demands, power consumption limitation, parallelism, heterogeneous computing and cost effectiveness are now driving constraints of both the HPC and embedded sectors. This convergence opens the way to the possibility of performing scientific computation on low power architecture originally developed for the embedded or mobile world. In this talk, we present the panorama of the low power architectures suitable for scientific computation. The INFN experience in building a low power cluster based on System-on-Chips (SoCs) is discussed together with the performance results in terms of power ratio and energy consumption obtained on that cluster. The applications used in the tests range from synthetic benchmarks to real life use cases. Results are compared to those obtained on traditional HPC architectures. An overview of the current European projects on low power computing for exascale HPC machine is finally presented.
        Speaker: Daniele Cesini (CNAF)
        Slides
    • 20:00
      Dinner
    • Session 5
      • 37
        Programming GPUs with OpenCL: Kernel programs
        Speaker: Dr Tim Mattson (Intel)
      • 38
        Programming GPUs with OpenCL: Performance issues
        Speaker: Dr Tim Mattson (Intel)
      • 10:00
        Coffee break Bertinoro

        Bertinoro

      • 39
        Lecture
      • 40
        Cluster Computing with MPI
        Speaker: Dr Tim Mattson (Intel)
        Slides
      • 41
        Consolidation
      • 13:30
        Lunch Bertinoro

        Bertinoro

      • 42
        The 10 core constructs every MPI programmer should know
        Speaker: Dr Tim Mattson (Intel)
      • 43
        Geometric decomposition and MPI
        Speaker: Dr Tim Mattson (Intel)
      • 16:30
        Coffee break Bertinoro

        Bertinoro

      • 44
        Information
        Speaker: Mauro Morandin (PD)
        Slides
      • 45
        Consolidation
      • 46
        Big Data: What happens when data actually gets big?
        There are Big Data problems today. Usually when researchers talk about Big Data, however, the data isn't that big. An inefficient solution stack based on direct products over data-sets (Map-Reduce/Hadoop), cramming data (the square peg) into whatever data-store is available (the round hole), and moving data around between data-severs and computer-servers: all of this is OK if Big Data is not that big. But what happens when the data in Big Data actually gets big? In this talk we will discuss how Big Data software solution stacks must evolve to address future Big Data problems. Our guiding principles are that in a world where Big Data is really big: * One size does not fit all; data must match the data store * Data movement is everything; move queries and processing to the data * Visualization must be a first class citizen of the Big Data solution stack We are developing a reference implementation of the sort of Big Data solution stack we envision will play a key role in the future. We call this the BigDAWG solution stack. The research behind BigDAWG is occurring within the Intel Science and Technology Research Center at MIT with collaborators from Brown University, University of Washington, University of Tennessee, and Portland State University.
        Speaker: Dr Tim Mattson (Intel)
        Slides
      • 20:00
        Social dinner Locanda della Fortuna (Bertinoro)

        Locanda della Fortuna

        Bertinoro

        Via Frangipane, 1
    • 20:30
      Dinner
    • Session 9
      • 47
        Students feedback
      • 48
        Final examination
      • 11:00
        Coffee break
      • 49
        Delivery of certificates of attendance
      • 12:00
        Lunch
      • 50
        Shuttle departure (to Forli' railway station)