EcoScale - ExaNeSt training workshop on FPGA implementation of OpenCL

Europe/Rome
Sala Direzione INFN (room number: 242) (Sapienza University of Rome - Department of Physics "G. Marconi")

Sala Direzione INFN (room number: 242)

Sapienza University of Rome - Department of Physics "G. Marconi"

P.le Aldo Moro 2, 00185 Rome (Italy)
Piero Vicini (ROMA1)
Description


A 2-day training workshop on FPGA implementation of OpenCL is organized in the framework of the EU H2020 projects, EcoScale and ExaNeSt, collaboration.
The workshop aims to a) introduce people to the use of OpenCL, b) discuss the differences between optimizing OpenCL code for GPU or FPGA and c) provide methods to obtain an RTL with the best performance.
Few general presentations and hand-on sessions on OpenCL development flow and related tools are foreseen. We will mostly focus on Vivado HLS, the tool where the performance, architecture and power optimization takes place. We will also have a brief look at SDAccel or SDx, the tools that "glue" together the C/C++ host code with the kernels running on the FPGA, both in terms of performance analysis and in terms of driver code generation.
Slides
Participants
  • Alessandro Lonardo
  • Andrea Biagioni
  • David Goz
  • Edson Horta
  • Elena Pastorelli
  • Francesco Simula
  • Giuseppe Piero Brandino
  • Iakovos Mavroidis
  • Konstantinos Georgopoulos
  • Luca Pontisso
  • Luca Tornatore
  • Luciano Lavagno
  • Michele Martinelli
  • Ottorino Frezza
  • Paolo Cretaro
  • Piero Vicini
  • Roberto Ammendola
  • Stefano Cozzini
  • Thursday, 16 March
    • 09:00 09:05
      Opening 5m
    • 09:05 10:20
      OpenCL and Xilinx methods tutorial (1) 1h 15m
      Speaker: Prof. Luciano Lavagno (PoliTO)
      Slides
    • 10:20 10:40
      Coffee break 20m
    • 10:40 13:00
      OpenCL and Xilinx methods tutorial (2) 2h 20m
      Speaker: Prof. Luciano Lavagno (PoliTO)
      Slides
    • 13:00 14:30
      Lunch 1h 30m
    • 14:30 16:00
      OpenCL and Xilinx methods hands-on session (Lab1) 1h 30m
      Speaker: Prof. Luciano Lavagno (PoliTO)
      Lab material
      Slides
    • 16:00 16:20
      Coffee break 20m
    • 16:20 18:00
      OpenCL and Xilinx methods hands-on session (Lab2) 1h 40m
      Speaker: Prof. Luciano Lavagno (PoliTO)
      Lab Material
      Slides
    • 19:00 21:00
      Social Dinner (TBC) 2h
    • 09:00 10:50
      ECOSCALE architecture and OpenCL tasks acceleration in hardware (I. Mavroidis) 1h 50m
      Speaker: Iakovos Mavroidis
      Slides
    • 10:50 11:10
      Coffe break 20m
    • 11:10 13:00
      Hands-on: programming TRENZ system (K. Georgopoulos) 1h 50m
      Speaker: Georgopoulos Kostas (FORTH)
      Lab Material
      Link to Petalinux-Xilinx Installation page
    • 13:00 14:30
      Lunch 1h 30m
    • 14:30 14:45
      INFN Application (Brain Simulation) 15m
      Speaker: Dr Elena Pastorelli (INFN - Rome)
      Slides
    • 14:45 15:00
      INAF Applications (Astrophysics) 15m
      Speaker: Dr David GOZ (OATS-INAF Trieste)
      Slides
    • 15:00 15:15
      Exact Lab Applications (Material and Climate Science) 15m
      Speaker: Dr Giuseppe Piero Brandino (ExaCt-Lab)
      Slides
    • 15:15 16:30
      Open discussion and brainstorming on EcoScale OpenCL-generated blocks in ExaNeSt infrastructure 1h 15m
    • 16:30 17:00
      Coffee break and closing 30m