24–30 May 2015
Europe/Rome timezone
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Design, Fabrication and Characterization of multi-guardring-furnished p+n Silicon Strip Detectors for future HEP experiments

28 May 2015, 11:45
15m
Oral S6 - Solid State Detectors Solid State Detectors

Speaker

Dr Kavita Lalwani (University of Delhi, INDIA)

Description

Si detectors, in various configurations (strips & pixels etc), have been playing a key role in High Energy Physics (HEP) experiments owing to their excellent vertexing and high precision tracking information. In future HEP experiments like upgrade of Compact Muon Solenoid experiment at the Large Hadron Collider, CERN & the proposed International Linear Collider, the silicon tracking detectors will be operated at very harsh radiation environment, which lead to both surface and bulk damage in silicon detectors which in turn changes their electrical properties, i.e. change in full depletion voltage, increase in the leakage current & decrease in the charge collection efficiency. In order to achieve the long term durability of Si-detectors in future HEP experiments, it is required to operate these detectors at very high reverse biases, beyond the full depletion voltage thus requiring higher detector breakdown voltage. Delhi University (DU) is involved in the design, fabrication and characterization of multi-guard-ring furnished ac-coupled, single sided, p+n silicon strip detectors for future HEP experiments. The design has been optimized using a two-dimensional numerical device simulation program (ATLAS-Silvaco). The Si strip detectors are fabricated with eight-layer mask process using the planar fabrication technology by Bharat Electronic Lab (BEL), INDIA. Further an electrical characterization set-up is established at DU to ensure the quality performance of fabricated Si strip detectors and test structures. In this work measurement results on non irradiated Si Strip detectors and test structures with multi-guard-rings using Current Voltage (IV) and Capacitance Voltage (CV) characterization set-ups are discussed. The effect of various design parameters, for example guard-ring spacing, number of guard-rings and metal overhang on breakdown voltage of Si strip detectors have been studied.

Collaboration

CMS collaboration at LHC, Switzerland and ILC

Primary author

Dr Kavita Lalwani (University of Delhi, INDIA)

Co-authors

Dr Ashutosh Bhardwaj (University of Delhi) Ms Geetika Jain (University of Delhi) Dr Kirti Ranjan (University of Delhi) Mr Ranjeet Dalal (University of Delhi)

Presentation materials