24–30 May 2015
Europe/Rome timezone
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The Silicon Vertex Detector of the Belle-II Experiment

28 May 2015, 10:10
15m
Oral S6 - Solid State Detectors Solid State Detectors

Speakers

Francesco Forti (PI)Ms Tomoko Morii (University of Tokyo Kavli IPMU (WPI))

Description

The Belle-II experiment will exploit the very high luminosity planned at the SuperKEKB flavor factory at KEK to perform many precision measurements and to search for new physics beyond the Standard Model. The high precision tracking system is composed of a two-layer DEPFET pixel detector (PXD), a four-layer double-sided silicon strip detector (SVD) and a central drift chamber (DCH). To maintain the required performance for low momentum tracking and vertexing, the SVD employs several innovative techniques: strip signals with a total of 200k channels are readout by about 5,000 APV25 ASICs mounted directly on the ladder with the novel Origami technique in order to minimize the signal path and the consequent capacitive noise; active evaporative cooling is used, with pipes directly in contact with the chip surface; the detector ladders have a lampshade geometry to minimize material in the forward direction. The Belle-II SVD design and prototype has been completed, and it is now in construction stage. The installation on the Belle-II detector is foreseen in 2017. In this paper, the design principles and construction status of the Belle-II SVD will be presented, together with some results from the beam tests performed.

Primary authors

Antonio Paladino (PI) Takeo Higuchi (Kavli IPMU (WPI), the University of Tokyo)

Presentation materials