As the size and scale of low temperature detector arrays continue to grow, the demands on the cryogenic multiplexing has dramatically increased. The microwave SQUID multiplexer is meant to address this issue by opening the possibility of multiple gigahertz of readout bandwidth per coax pair. With this readout technique, complexity is moved from the cryogenic stages to the room temperature hardware and digital signal processing firmware. With the variety of microwave SQUID multiplexer designs that are being developed at NIST, the signal processing firmware must have sufficient agility to accommodate different numbers of channels, different resonator bandwidths, and different resonator spacings. The necessary flexibility is possible with the advent of high-performance ADCs and DACs integrated with field programable gate arrays (FPGAs).
We will describe our modular firmware infrastructure and how it can be adapted to different microwave multiplexer applications. Our firmware is implemented on a commercial, off-the-shelf data acquisition platform capable of manipulating up to four gigahertz of bandwidth. Depending on the application, we can modify the channelization module to achieve different target resonator bandwidths and spacings. We will discuss the application space of microwave SQUID multiplexers and how that impacts the firmware modules that need to be implemented. This modular firmware architecture for microwave SQUID multiplexers can be ported to a wide variety of Xilinx FPGAs, including the current and future generations of Xilinx’s RFSoCs.
|Student (Ph.D., M.Sc. or B.Sc.)||N|
|Less than 5 years of experience since completion of Ph.D||N|