Speaker
Description
A significant number of instruments employ the superconducting transition-edge sensor (TES) because of the exquisite calorimetry and bolometry it enables. The realization of the TES relies on fabricating a superconducting element with controllable transition temperature and normal state resistance. One primary way to achieve this is to form a bilayer consisting of a normal/superconductor stack. It is generally assumed that the bilayer must be deposited without breaking vacuum to ensure a high-quality interface between the two materials. With this requirement, significant processing restrictions arise: the TES bilayer must be patterned top-down which often necessitates banks to eliminate shorts, features cannot be defined separately in the lower (typically superconducting) layer, and critical temperature (Tc) calibration cannot be performed until after the complete bilayer is patterned.
To remove these limitations, we are introducing a novel bilayer fabrication strategy. We can break vacuum between the deposition of the superconductor and normal metal while still ensuring a uniform interface across the wafer. Compatibility with separate deposition chambers (sputtering for low-stress Mo and evaporation for Au) ensures optimization of material properties for a wide variety of bilayer materials. We will present results from TESs demonstrating highly tunable normal resistance and Tc’s (55 mK and above), wafer-scale uniformity in these parameters, and X-ray spectra. We have also fabricated unique TES structures that take advantage of the flexibility provided by separately processing each bilayer metal. Instead of lengthening the current path through the TES with the addition of normal metal bars, we can etch a serpentine structure into the superconductor to create the same effect. Continued testing of these and other designs may yield advantages to noise suppression, magnetic field sensitivity, and tuning of Tc in a simplified, flexible fabrication process.
| Student (Ph.D., M.Sc. or B.Sc.) | N |
|---|---|
| Less than 5 years of experience since completion of Ph.D | Y |
