Speaker
Description
The cryogenic systems is becoming vital in R&D activities in many fields ranging from cooled detector integrated electronics to quantum computing systems. Although CMOS technology has been widely studied, current models do not consider transistor behavior at ultra-low temperatures. Developing the necessary instrumentation to characterize transistor structures fabricated in CMOS commercial processes, including a 65nm one, is the aim of this work.
A 4K closed-cycle cryostat has been modified to characterize the samples of interest and it includes a cold-finger with an adapter designed to fit 24-pin ceramic dual in-line packages (C-DIP), chosen based on their high thermal conductivity at ultra-low temperatures. In order to control the cooling rate of the system and achieve different operating temperatures, three thermal stage structures were designed, manufactured and characterized to work on top of the 4K plate at different distances. They yield minimum cooling rates of respectively 0.2K/min, 0.17K/min, and 0.15K/min. This allows for measurements to be performed while sweeping down the operating temperature. The temperature data are monitored and saved using a NI-Labview program interfaced to a Lakeshore temperature monitor. In order to achieve a good tradeoff between the necessary electrical conductivity and the maximum heat transfer allowed by the system, manganin wiring was used inside the closed-cycle cryostat. Since the manganin thermal conductivity varies with temperature, the wiring was performed to enable working below the maximum power dissipation level allowed (~2 or 3 µW) whilst maintaining the temperature stable in the sub-Kelvin regime. The cryostat has four different temperature stages introduced to reduce the heat transfer from the measurement equipment to the device under test. Vacuum connectors and a matrix with triaxial connectors are both used to connect the semiconductor device analyzer (SDA) held at room temperature with the internal connections.
| Student (Ph.D., M.Sc. or B.Sc.) | Y |
|---|---|
| Less than 5 years of experience since completion of Ph.D | N |
