Speaker
Description
The PIP-II timing system is planned to be a two part system consisting of a global timing system (referred to as ACLK) that provides high level, event based timing for the whole Fermilab accelerator complex while the second part is a RF synchronized clock system unique to the PIP-II Linac itself (referred to as LCLK). The ACLK System will make use of an external 10 MHz GPS based signal source as a reference for its 650 MHz phase lock as it is the reference frequency for the TCLK output of the system (needed to support legacy hardware around complex). The LCLK System will use a PIP-II Linac RF reference (162.5 MHz) from the Linac LLRF system to allow beam synchronized event placement. Both the ACLK and LCLK systems will have a clock output with a data frame of 16 event bits + 32 data bits with frames broadcast at 650 MHz, phase locked to the 10MHz reference in the case of ACLK and the PIP-II LLRF sourced 162.5 MHz reference in the case of LCLK.
