Speaker
Description
We present a mixed-signal ASIC, called ALCOR (A Low-power Chip for Optical sensor Readout), designed for the readout and digitization of signals from Silicon Photomultipliers (SiPMs) in the framework of the dual-radiator RICH (dRICH) detector of the ePIC experiment at the Electron-Ion Collider (EIC).
ALCOR features 32 channels arranged in an 8x4 matrix. The amplifier input stage is a low impedance current conveyor based on a regulated common-gate topology to preserve the steep rising edge of the SiPM signal. The versatile front-end is able to work with positive or negative input polarity signals and includes four gain settings and two discriminators with 6-bit DAC programmable thresholds. Each channel also incorporates quad-buffered low-power TDCs based on analogue interpolation providing precise timestamping with a 25-50 ps time bin, while the signal amplitude can be derived from the time-over-threshold (ToT) measurement. The ASIC data-push architecture features a fully-digital output with a maximum event rate of 2 MHz (1 MHz) per channel when operating the chip in single-photon counting mode (ToT mode). ALCOR is designed in a 110 nm CMOS technology and the power consumption is less than 10 mW per channel.
ALCOR has been extensively tested in the laboratory standalone and coupled to different SiPM models to assess its functionality and performance. The results have been validated in a beam test campaign with a prototype of the dRICH detector and 1280 3x3 mm² SiPM sensors. Radiation tolerance tests for total dose and single-event upset have also been performed.
In this presentation, a detailed description of the ALCOR chip architecture will be given and the main results from the ASIC electrical characterization and tests with SiPM sensors will be discussed, as well as the plans for the chip final version in which new, EIC-driven, functionalities will be implemented.
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