26 May 2024 to 1 June 2024
La Biodola - Isola d'Elba (Italy)
Europe/Rome timezone

Matterhorn, a high flux detector for 4th generation synchrotrons

31 May 2024, 08:31
3h 59m
Sala Elena

Sala Elena

Poster T7 - Electronics and On-Detector Processing Electronics and On-Detector Processing - Poster session

Speaker

Aldo Mozzanica (Paul Scherrer Institut)

Description

The upgrade of most synchrotrons to diffraction-limited storage rings (DLSR), presents various challenges for detectors, above all the significantly increased photon flux exceeding the count rate capabilities of existing single photon-counting detectors. In response to this challenge and targeting the upgrade of the Swiss Light Source, the PSD detector group at the Paul Scherrer Institut (PSI, Switzerland), initiated the development of Matterhorn, a hybrid pixel detector designed to meet the specific requirements of DLSRs.
The Matterhorn ASIC boasts a pixel pitch of 75 µm and is designed using UMC 110nm technology. Each pixel features a charge-sensitive amplifier and a shaper with selectable polarity, gain, and shaping time, feeding four independent comparators, with individual threshold and 6-bit trimbits, and four 16-bit independently gatable counters, which can be operated using various configurations. The value of the counters can be stored in local memory, enabling continuous operation.
In high-flux mode, the additional comparator thresholds can be configured to values exceeding 100% of the incoming beam energy, allowing for the detection of the pile-up of two or more photons, effectively extending the pixel count rate capabilities to values exceeding 20 MHz at a 10% counting loss with an ENC<200e-rms.
This contribution will initially explain the working principle and functionalities of Matterhorn and present the test results of our two prototypes.
Matterhorn0.1 features a digitally synthesized control periphery responsible for chip control and readout. It is connected to two serial links operating at a clock frequency of 1.6 GHz provided by an on-chip PLL.
Matterhorn0.2 addresses issues from the first version and introduces on-chip DACs for biasing, additional debugging capabilities, and an improved readout circuitry, achieving a data rate of 3.125 Gb/s.
We expect that Matterhorn will contribute to extend the outstanding performance and reliability of single photon counting detectors to next generation light sources.

Role of Submitter I am the presenter

Primary author

Aldo Mozzanica (Paul Scherrer Institut)

Co-authors

Anna Bergamaschi (Paul Scherrer Institut) Bernd Schmitt (Paul Scherrer Institut) Davide Mezza (Paul Scherrer Institute) Erik Fröjd (Paul Scherrer Institut) Filippo Baruffaldi (Paul Scherrer Institut) Konstantinos Moustakas (Paul Scherrer Institut) Roberto Dinapoli (Paul Scherrer Institut)

Presentation materials