Speaker
Description
The small (15 mm)-diameter Muon Drift Tube (sMDT) detector technology has been chosen and constructed in order to cope with the increased background counting rates expected at the High Luminosity-Large Hadron Collider (HL-LHC) and Future Circular Collider (FCC-hh). Unfortunately, the rate capability of the sMDT drift tubes in terms of muon detection efficiency and spatial resolution is strongly limited by the performance of the readout electronics. For this reason, to support the present and future sMDT based high-resolution trigger system with the continuous readout of the muon chambers and the increased overall trigger rates and further enhance the rate capability of those detectors, a new Amplifier-Shaper Discriminator (ASD) readout chip with a faster peaking time compared to the old chip has been developed with the possibility of the reducing the discriminator threshold crossing time jitter and thus improving the time and spatial resolution with and without $\gamma$-background radiation. In this contribution, we show the results of the extensive studies of the sMDT detectors with old and new readout chips and as well as with discrete readout circuits with baseline restoration functionality performed at varying background irradiation from the $^{137}$Cs $\gamma$-source at the CERN Gamma Irradiation Facility (GIF++) with the highly energetic muon beam ($\sim$100 GeV) from the SPS. In addition, a method compensating the gas gain drop due to space charge at high $\gamma$-background hit flux by adjusting the sMDT operating voltage will be presented. Simulations are shown that the added active baseline restoration circuits in the front-end electronics chips in order to suppress signal-pile-up effects at high counting rates further lead to significant improve the efficiency and resolution parameters of the sMDT detector.
