Development of n^+-in-p planar pixel sensor flip-chip modules with quad FE-I4 readout ASIC's

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20m
Sestri Levante

Sestri Levante

Grand Hotel dei Castelli
contributed paper

Relatore

Yoshinobu Unno (KEK)

Descrizione

We have developed prototype pixel detector modules for the inner tracker of the ATLAS detector to be upgraded for the high-luminosity LHC. The module is made of pixel sensor and pixel readout ASIC's, being flip-chip bumpbonded. The pixel sensor is an n^+-in-p planar sensor of a size of 2×2 of ATLAS FE-I4 pixel readout ASIC's, called the quad-sensor. Seven such sensors were laid out in 6-inch p-type FZ wafer, with three different gaps between the ASIC's, and thinned to 150 µm. The wafers of the FE-I4 ASIC's were also thinned to 150 µm and deposit with lead-free SnAg solder bumps. The bumpbonding was made specifically by taking care of removing oxidation in the surface of the bump pads/solders of the sensors/ASIC's. Four of the quad-sensor modules, with 16 ASIC's, were bumpbonded by introducing Hydrogen-plasma reflow process (H-SnAg), and in addition, two were by applying solder-flux. The quad-sensor modules were gone through thermal cycles between +/-40℃, irradiation to protons of a fluence of approximately 3×10^15 neq/cm^2. Bump disconnection was checked against the beta-ray response before and after the thermal cycles and the irradiation. No large-area bump disconnection was observed. The modules were evaluated with testbeams and showed good performance. Authors: Y. Unno, Hamamatsu Photonics K.K. and ATLAS-J Silicon Collaboration

Autore principale

Yoshinobu Unno (KEK)

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