MuPix7 – a fast monolithic HV-CMOS pixel chip for Mu3e

Not scheduled
20m
Sestri Levante

Sestri Levante

Grand Hotel dei Castelli
contributed paper

Speaker

Dr Frank Meier Aeschbacher (Universität Heidelberg)

Description

The MuPix7 chip is a monolithic HV-CMOS pixel chip, thinned down to 50 µm. It provides continuous self-triggered, non-shuttered readout at rates up to 30 Mhits/chip of 3 x 3 mm² active area and a pixel size of 103 x 80 µm². The hit efficiency depends on the chosen working point. Settings with a power consumption of 300 mW/cm² allow for a hit efficiency >99.5%. A time resolution of 11 ns (Gaussian sigma) is achieved. We are going to present the latest results from 2016 test beam campaigns and will cover the roadmap towards the final chip for Mu3e.

Primary author

Dr Frank Meier Aeschbacher (Universität Heidelberg)

Co-author

Dr Dirk Wiedner (CERN)

Presentation materials

There are no materials yet.