Speaker
Prof.
Manfred Jeitler
(HEPHY Vienna)
Description
Various parts of the CMS Level-1 hardware trigger will be upgraded to cope with increasing luminosity, using more selective trigger conditions at Level-1 and improving the reliability of the system. Many trigger subsystems use FPGAs (Field Programmable Gate Arrays) and will benefit from developments in this technology, allowing much more logic into a single FPGA chip, thus reducing the number of chips, electronic boards and interconnections and in this way improving reliability. A number of subsystems plan to switch from the old VME bus to the new microTCA crate standard. Using similar approaches, identical modules and common software whereever possible will reduce costs and manpower requirements and improve the serviceability of the whole trigger system.
for the collaboration
CMS
Primary author
Prof.
Manfred Jeitler
(HEPHY Vienna)
