In this contribution, we will present the very preliminary experimental performances obtained with the ASIC FAST3. FAST3 is a multi-channel amplifier optimized to read out LGAD sensors and designed to achieve a temporal jitter below 20 ps.
FAST3 was developed by the microelectronic group of INFN Turin. FAST3 has been designed in UMC 110 nm CMOS technology, and has 16 channels distributed over...
The design of the Micro Vertex Detector (MVD) for the PANDA experiment is optimized for the detection of secondary vertices and maximum acceptance close to the interaction point. The MVD consists of a 4-layer barrel section, placed around the interaction point, and a 6-disks forward section, located in the forward position. The outermost layers of the MVD will be equipped with double sided...
ASTRA-64 (Adaptable Silicon sTrip Read-out ASIC) is a 64-channel mixed-signal custom IC designed for micro-strip silicon sensors read-out. Manufactured in a 110-nm technology node, it comprises two identical mirrored subcircuits, each accommodating 32 channels.
Recursively, each channel integrates two main blocks: a charge-sensitive amplifier and a shaper. The former features two programmable...
