FELIX: The new Detector readout system for the ATLAS Experiment.
by
Marco Trovato
→
Europe/Rome
Description
After the current LHC shutdown (2019-2021), the ATLAS experiment at the LHC at CERN will be required to operate in an increasingly harsh collision environment. The LHC will deliver luminosities up to three times the original design value, with a commensurate increase in the number of interactions per bunch crossing. To maintain physics performance in this new regime, the ATLAS experiment will undergo a series of upgrades during the shutdown. A key goal of this upgrade is to improve the capacity and flexibility of the detector readout system. To this end, the Front-End Link eXchange (FELIX) system has been developed. FELIX acts as the interface between the data acquisition; detector control and TTC (Timing, Trigger and Control) systems; and new or updated trigger and detector front-end electronics. FELIX functions as a router between custom serial links from front end ASICs and FPGAs to data collection and processing components via a commodity switched network. Links may aggregate many slower links or be a single high bandwidth link. FELIX also forwards the LHC bunch-crossing clock, fixed latency trigger accepts and resets received from the TTC system to front-end electronics. FELIX uses commodity server technology in combination with FPGA-based PCIe I/O cards. FELIX servers run a software routing platform serving data to network clients. Commodity servers connected to FELIX systems via the same network run the new multi-threaded Software Readout Driver (SW ROD) infrastructure for event fragment building and buffering. In addition the SW ROD supports detector specific data processing, and serves the data, upon request, to the ATLAS High Level Trigger for Event Building and Selection.
This presentation will cover the design of FELIX, the SW ROD, and the results of the installation and commissioning activities for the full system in summer 2019. If time allows, the presentation will also cover brand new results on the readout of the RD53A pixel integrated circuits, which are intended to form the basis for the production designs of ATLAS and CMS during HL-LHC.
