Speaker
Description
The Compact Muon Solenoid (CMS) experiment at the CERN LHC has traditionally relied on a highly selective Level-1 trigger to reduce the 40 MHz LHC collision rate to a rate more manageable for data-reading and recording. During LHC Run 3, CMS deployed a novel 40 MHz data acquisition system that enables the continuous readout and real-time processing of L1 trigger-level detector data at the full bunch-crossing rate, without impacting standard data-taking.
For the HL-LHC era, the Level-1 Trigger will undergo a major architectural evolution, delivering significantly richer and higher-quality reconstructed physics objects. This shift toward near-offline reconstruction at the trigger level introduces substantially increased computational requirements for continuous 40 MHz acquisition and analysis.
To address these constraints, different heterogeneous computing systems have been considered integrating multiple types of hardware accelerator. Status of the art FPGA platforms and GPU clusters are considered for offloading event selection workloads and more complex reconstruction tasks.
This talk presents the motivation, architecture, as well as the physics and detector-performance opportunities unlocked by 40 MHz scouting for future real-time analysis strategies foreseen for the High-Luminosity LHC era.