Speaker
Description
In future high-luminosity colliders, vertex detectors must withstand radiation levels of 6×10^16 neq/cm2 and a total ionization dose around 10 MGy on SiO2, while delivering an output bandwidth of approximately 100 Gbit/s per ASIC. To increase the active sensing area, these detectors will feature a three-dimensional design with Through Silicon Vias (TSVs) linking the frontend chip and an active interposer hosting the readout and data processing circuitry. Currently, frontend chips lack internal programmable logic, relegating data-processing tasks such as clustering and tracking to external commercial FPGAs.
The FERRad project addresses these limitations by developing highly integrated, radiation-hardened embedded FPGAs (eFPGAs) that can be integrated inside the active interposer. Its main deliverable is FERR1, a 28 nm ASIC embedding an eFPGA that tolerates up to 10 MGy total ionizing dose and is resilient to single event upsets.
This talk will present the FERRad project, detailing the development of FERR1, its architecture, radiation-hardening strategies, and preliminary performance assessments.
