Speaker
Dr
Marian Krivda
(University of Birmingham)
Description
The NA62 trigger system works with 3 trigger levels. The first trigger level is based on hardware, central trigger unit, so called L0 Trigger Processor (L0TP) and Local Trigger Units (LTU), which are located in the experimental cavern. Other two trigger levels are based on a software, computer farm, located on a surface. The L0TP receives information from 12 triggering sub-detectors asynchronously via ethernet , processes it, and then transmits a final trigger decision synchronously to each sub-detector through Trigger and Timing Control (TTC) system. The interface between L0TP and TTC system, which is used for trigger and clock distribution, is provided by Local Trigger Unit board (LTU). The LTU can works in two modes: global and stand-alone. In the global mode, the LTU is providing an interface between L0TP and TTC system. In the stand-alone mode, the LTU can fully emulate L0 processor and such provides independent runs for each sub-detector for testing or calibration purposes. In addition to emulation functionality there is implemented functionality which allows to synchronize the LTU with the L0 processor and the TTC system. For testing and debugging purposes there is implemented Snap Shot Memory (SSM) interface which can works in an input or an output mode. The trigger system will be permanently monitored by reading counters, with considerable built-in redundancy, at regular intervals.
Primary author
Dr
Marian Krivda
(University of Birmingham)
Co-authors
Dr
Cristina Lazzeroni
(University of Birmingham, UK)
Dr
Roman Lietava
(Comenius University, Bratislava, Slovakia)
Dr
Tomas Blazek
(Comenius University, Bratislava, Slovakia)
Dr
Vladimir Cerny
(Comenius University, Bratislava, Slovakia)
