Introductory course to VHDL

Introduction to VHDL

4 Mar 2024, 14:30

3h

Speaker

Andrea Triossi (Universita` degli Studi di Padova)

Description

Recording:
https://unipd.zoom.us/rec/play/QJKP7o6JYlIWxNcFdD83JVfFlkfEAbnPxI2amnU13cd-jykA_YorSuLMwLnDE3N0rJ1droBszR2vtxzc.b1BUK4n8XHJZCZ5y
Passcode: .8P%Xtsu

Presentation materials

VHDL_by_ex.pdf

combinatorial

1bit_adder.vhd

and_port.vhd

and_port_2.vhd

comb_func.vhd

comb_func_2.vhd

nbit_adder_gen.vhd

not_port.vhd

or_port.vhd

pins.xdc

tb_nbit_adder.vhd

tristate.vhd

tristate2.vhd