Name: PDA Meeting
Start: 2021-08-10T16:00:00+02:00
End: 2021-08-10T19:00:00+02:00
Location: No location set

PDA Meeting

Tuesday, 10 August 2021 - 16:00

Monday, 9 August 2021
Tuesday, 10 August 2021

16:00 Ag backside tests
Ag backside tests
16:00 - 16:20
-assembled tiles with Ag backside- 450 micron thickness, and conductive epoxy bonding. After cycling in LN, most tiles detached and some broke. -document in progress describing the double cathode measurements with TiTiN as a fallback solution in case metal bonding with Au backside or Ag backside will not work -finite element analysis of Ag backside tiles shows stress reaching 500 MPa at points. Will vary the thickness of Si in this analysis. -supplier processing 550 micron thick wafers with Ag backside now, hoping to receive by Fri. (after which LNGS closes and lab starts up Sept. 1) -Paolo will bring broken SiPMs to LF to study the Ag breaking mechanism Discussion: -correlate these tiles with FBK measurements? Can issues be caught before dicing?
16:20 Au backside tests - Lucia Consiglio (NA)
Au backside tests
- Lucia Consiglio (NA)
16:20 - 16:40
-Au backside tiles show no cracking. nb these SiPMs are 100 um thicker (550 microns) vs. Ag (450 microns). Surprising that this makes such a difference. -however see one odd feature-- an intermediate peak in amplitude spectrum which can be made to disappear by doing a forward I-V curve (at 100 mA, although this is default. Didn't test at lower current-- if see this again will try step of currents). The intermediate peaks belong to 1 SiPM with a very long recharge time. Saw this in 2 tiles out of 10 assembled. -burnout in all-metal bond seems improbable. -not an issue for DS20k production because will do forward I-V curves. -average waveform of extra peak has significantly longer tau -tile+ with Au SNR 29.5 -tile with Au 2s3p SNR 29.8 -all have very similar average waveform Tests of Au tiles reported by Lucia: -all tiles assembled with 6 solder dots, see no high-resistivity short anymore (as observed in few 9 solder-dot Au tiles) -measured in 4s6p configuration except for one 2s3p -acquired noise spectra and reverse IV at RT and LN -acquired waveform data at 7 VoV -analysed gain, SNR, with raw and ARMA filtering -find SNR 28-30 after filtering -saw 2 tiles with intermediate peaks, these were suppressed after forward I-V (injecting 100 mA) alhough in one a tiny peak remains in amplitude spectrum but not in charge (because the resolution is lower). Bottom line: Au is working and looks good. Discussion: -should keep this tile (the double peak one) as a reference for testing, check if the double peak returns vs. time. Could see this at RT already. -also try repeated LN cycling? -can these be correlated with FBK measurements to catch before dicing? will check the mapping. -tile 75; initially not able to make reverse I-V b/c SiPM had disconnected (maybe due to large parasitic resistance?), then did a forward I-V and after this the SiPM has been working...
16:40 Production plans
Production plans
16:40 - 17:00
Tiles: -Currently have 480 working Au dies. -FBK shipped another wafer to LNGS yesterday, tested in quarters, which allows to build ~26 tiles with Au backside. -this will not be enough to populate PDUslim or PDU+ and continue the aging studies. -to produce 4 tile+ (+1 with FR4) with Au, 4 2s3p, and the remaining for single channel tiles. Discussion: CG suggests 4 tile + 1 Au for slim, however its grouping is 2. From AR following the meeting: we can produce a total of 26 tiles with gold out of which 8 have already been produced (1 of them is 2s3p). Plan is: 3 2s3p and 4 tile+ having 12 single-channel tiles available. However priority is given to debugging and such number can change in favour of single-channel tiles if the conditions will require it. Plan based on what is known now: -PDUslim with the tiles now in Pisa from Feb. -PDU+, will put TiTiN with epoxy and quadrant with Au -if receive 4 wafers of 550 um Ag in Sept. (and 2 with 450 um) and they work, then will be able to populate 32 tiles from the 4 wafers, will have 10 multipin, and can use 22 in PDUs of which 10 tile+ and 12 2s3p. -if silver, tiles will arrive in end Sept. given personnel constraints. Discussion: -Are AlCu, AlSi options still on the table? yes. Because need a fall-back in case Ag, Au don't work. -will produce a PCB that can use to do the double cathode trick by end Aug. Will try this with both epoxy and solder bonding. [[Can this be done in-situ?]] -timescale for assessment of best back metal? need the Ag wafers to conclude this. Will have sufficient data by end Sept. PCBs: -LNGS to send UK gerber on Aug. 13 to produce --multicathode PCB --MB+ (with BoM and CPL if want it populated) --vMB1/4 (with BoM and CPL if want it populated) -Genova to send UK gerber by Aug. 13 to produce -vTile+ (with BoM and CPL) Next mtg: Aug. 31