Goal of the meeting, the next months

• Fabrizio Palla (PI)

Room: 250

Geometry, pattern banks and data formats

• Sebastien Viret (CNRS/IN2P3)

Room: 250

Status of the PCA (in C++) and its floating point implementation

• Loriano Storchi (P)

Room: 250

Thermal analysis of the mezzanine Room: 250

Lookup table and constants Room: 250

Filtering/reducing combinations FW Room: 250

Filtering/reducing combinations 2

• Massimo Casarsa (TS)

Room: 250

Status of DO and TF firmware

• Christos Gentsos (Auth)

Room: 250

Status of AM06 chip and changes wrt AM05

• Alberto Annovi (PI)

Room: 250

Aurora link firmware status

• Guido Magazzu' (PI)

Room: 250

Status of the AM05 mezzanine tests - what have we learned?

• Giacomo Fedi (PI)
• DANIEL MAGALOTTI (PG)
• Guido Magazzu' (PI)

Room: 250

Proposed changes for the AM06 mezzanine Room: 250

Discussion on mezzanine qualification procedures

• Bruno Checcucci (PG)

Room: 250

Discussion on firmware integration policy Room: 250

Signup for the AM06 mezzanine work and item distribution Room: 250 Test 4 AM blocks cross talk and operations with 4 AM blocks (including sync) Check the power budget of the mezzanine (measurements and availability from the Pulsar 2b, including external power) Check the clock jitter. Clock should be changed anyway to match Xilinx specs. Check external memory needs. Measure the time of access. Decide which type. Evaluate resources needs for the FPGA including all FW. Evaluate the time to modify the PCB for 8 AM chips Evaluate the time to modify the PCB to accommodate the needed changes NB: the last 2 items depend on how many engineers will be working. So Time and FTE estimates.

Plan for the next months Room: 250