Energy Efficiency and I/O Performance of Low-Power Architectures

by Francieli Zanon Boito (CORSE - Compiler Optimization and Run-time Systems, Inria Grenoble)

Wednesday 27 Jun 2018, 15:00 → 16:00 Europe/Rome

Sala riunioni II piano

As large-scale parallel platforms are deployed to comply with the increasing performance requirements of scientific applications, the power and energy wall becomes a concern of the HPC community. In this talk, I will discuss work conducted in the context of the HPC4E project in collaboration between Europe and Brazil to investigate the viability of using low-power architectures as file system servers for HPC environments. I'll discuss results obtained with synthetic benchmarks and a real seismic application.