Speaker
Andrea Biagioni
(ROMA1)
Description
The NaNet project aims to deliver a low-latency, high-throughput data transport mechanism for GPU-based real-time systems. The goal is a FPGA-based PCIe Network Interface Card (NIC) design with GPUDirect P2P/RDMA capability featuring a configurable and extensible set of data transmission channels.
An ad-hoc network stack protocol offload engine and a data stream processing stage combined with the GPUDirect capability make NaNet suitable for real-time GPU contexts.
The design currently supports both standard - GbE (1000BASE-T) and 10GbE (10Base-R) - and custom - 34 Gbps APElink and 2.5 Gbps deterministic latency KM3link - channels, but NaNet architecture modularity allows for a straightforward inclusion of other link technologies.
A description of the NaNet architecture and its performances is given, showing two use cases for it: the GPU-based low-level triggerfor the RICH detectorin the NA62 experiment at CERN and the on-/off-shore data transport system for KM3NeT-IT underwater neutrino telescope.
This work has been funded by the European FET FP7 project EURETILE (grant 247846).
