Speaker
Description
Quantum computers promise to revolutionize computation. However, nowadays, their usefulness is still strongly limited by hardware noise, limited device availability, and the considerable cost of simulating quantum circuits on classical machines. These challenges become particularly evident when considering real-world applications, such as training Quantum Neural Network (QNNs), where the required number of circuit evaluations can quickly become prohibitively large as qubit count and circuit depth increase.
To overcome this bottleneck, we introduce a hardware–software methodology that accelerates QNN training by offloading quantum-circuit execution to an efficient FPGA-based engine. This architecture uses deep pipelining and compact data representations to emulate quantum operations at high speed while the classical optimization loop remains in software. This co-designed workflow achieves at least a 1.4× end-to-end speedup over CPU-only execution, while gains increase for larger and deeper models, demonstrating that real-time emulation during learning is already feasible with today’s digital hardware.
This contribution is part of a broader research effort focused on practical quantum technologies across multiple fronts: quantum optimization with digital Ising machines; quantum benchmarking and compilation methodologies; and automated workflows for developing quantum solutions to real-world tasks, thus improving the accessibility of quantum computing. Our method will reduce the time and computational resources invested in the exploration of quantum models, enabling a scalable and affordable path towards QML and enriching a growing set of tools and methods that bridge the gap between physics-based devices, algorithmic innovation, and advanced computing architectures.
| Sessions | Quantum Machine Learning: |
|---|---|
| Invited | No |