SVT - FE chip

Friday 14 Oct 2011, 11:00 → 13:00 Europe/Rome

Giuliana Rizzo (PI)

EVO CONNECTION Title: SVT-FE chips Description: Community: SuperB Password: supersvt Meeting Access Information: - Meeting URL http://evo.caltech.edu/evoNext/koala.jnlp?meeting=MsMiMI2t2eD8Da9l9vDt9s - Password: supersvt - Phone Bridge ID: 415 5340 Password: 1229 Central European Summer Time (+0200) Start 2011-10-14 11:00 End 2011-10-14 13:00 In case EVO doesn't work we will use the INFN Phone system: http://server10.infn.it/video/index.php?page=telephone_numbers - Dial code 3232 #

1 Update on analog design for fast channels L0-L3

Speaker: Lodovico Ratti (PV)

Slides strip_FE.pdf strip_FE.ppt

2 Update on analog design for L4-L5

Speaker: Carlo Ettore Fiorini (MI)

Slides FE_Polimi.pptx

3 Update on in-strip logic design

Speaker: Roberto Beccherle (GE)

Slides RB_20111014.pdf

4 Update on readout architecture VHDL simulation

Speaker: Filippo Maria Giorgi (BO)

5 Peripheral blocks

Speaker: Valerio Re (PV)

Slides IPblocks.pptx

6 Discussion