The LHC is restarting the Run-3 operation with keeping longer time with an instantaneous luminosity of about 2.0×10^34 cm-2s-1 from this year to 2025. In order to cope with the high event rate, upgrades of the ATLAS Level-1 Muon trigger system were required. The Level-1 Muon trigger system identifies muons with high transverse momentum by combining data from a fast muon trigger detector, Resistive-Plate Chamber (RPC) and Thin-Gap Chamber (TGC). Since Run 3, the system introduces improves the trigger logic using the new detectors called the New-Small-Wheel (NSW) and RPC-BIS78, which will be installed in the inner station region for the endcap muon trigger. Finer track information from the NSW and RPC-BIS78 can be used as part of the muon trigger logic to enhance performance significantly. In order to handle data from both TGC and NSW, some new electronics have been developed, including the trigger processor board known as Sector Logic (SL). The SL board has a modern FPGA to make use of Multi-Gigabit transceiver technology, which will be used to receive data from the new detectors. The readout system for trigger data has also been re-designed, with the data transfer implemented with TCP/IP instead of a dedicated ASIC. This makes it possible to minimize the use of custom readout electronics and instead use some commercial PCs and network switches to collect, format, and send the data. This readout data is useful for performance validations and further improvements. This presentation describes the aforementioned upgrades of the level-1 Muon trigger system. Particular emphasis will be placed on the first results from the early phase of commissioning in 2022. The newest status about coming improvements and the expected performance will also be presented.