We propose a new generation of VLSI processor for pattern recognition based
on Associative Memory architecture, optimized for on-line track ﬁnding in high-
energy physics experiments. We describe the architecture, the technology stud-
ies and the prototype design of a new R&D Associative Memory pro ject: it
maximizes the pattern density on ASICs and improves the functionality for the
Fast Tracker (FTK) proposed to upgrade the ATLAS trigger at LHC.
Finally we will focus on possible future applications inside and outside HEP:
from the use in the level 1 Trigger selection at SLHC to the recent proposal to
use a set of AM VME boards as coprocessor for the oﬄine reconstruction of
events and as coprocessor for human vision simulations.
Keywords : Pattern Recognition; Associative Memory; Trigger System; R&D,