Description
Monolithic detectors integrating readout and detecting elements in the same piece of silicon offer significant advantages compared to hybrid solutions: detector assembly is greatly facilitated and production cost reduced, charge collection electrodes can be realized with very small capacitance values (down to a few fF!) yielding extremely favorable power-signal-to-noise performance.
Such monolithic detectors have been implemented integrating CMOS on very high resistivity substrates (1E12 cm-3), and more recently using standard CMOS imaging technologies. Both approaches have been successful and have demonstrated this good power-S/N performance. However, the former are difficult to produce in volume, and the latter have sequential readout schemes often not compatible with time-stamping requirements of high energy physics experiments, and are often very sensitive to radiation damage.
The presentation will concentrate on the design of the device and the readout circuitry of monolithic detectors, and on the perspectives of realizing such detectors in modern commercial CMOS technologies for use in future high energy physics tracking detectors. Charge collection, electric field and breakdown, the interaction between power and signal-to-noise in the analog part of the readout and issues with the digital circuitry and radiation tolerance will be covered.
