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\documentclass[nocopyright]{cimento}

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\usepackage{graphicx}  % got figures? uncomment this

\title{Quality control  for the ATLAS ITk Pixel Flex PCB}
\author{
G.~Chiodini\from{ins:x}\ETC\thanks{gabriele.chiodini@le.infn.it},
M.R.~Coluccia\from{ins:x}, 
S.~Maggiore\from{ins:x}, 
F.~Martina\from{ins:x}\thanks{francesco.martina@le.infn.it},
A.~Miccoli\from{ins:x}, 
A.~Pellegrino\from{ins:x}\from{ins:z}, 
S.~Spagnolo\from{ins:x}\from{ins:y}
        \atque
C.~Veri\from{ins:x}}
\instlist{
\inst{ins:x} INFN, Sezione di Lecce, Italy
\inst{ins:y} Dip. di Matematica e Fisica \textquotedblleft Ennio De Giorgi\textquotedblright, Universit\`a del Salento - Lecce, Italy
\inst{ins:z} Nikhef, SciencePark 105,1098 XG Amsterdam, the Netherlands
}
%% When only one author is present, please do not use the command \from{} near the author name.



\begin{document}

\maketitle

\begin{abstract}
The ITk hybrid pixel detector features thousands of planar and 3D sensor modules adopting high-reliability flexible printed circuits (the \emph{flexes}). Given the harsh environment of HL-LHC, rigorous quality control is essential. This work outlines the procedures standardised by the collaboration to validate the flexes, including the visual inspection, metrology, and electrical testing, ensuring defect detection prior to module assembly and thus maximizing production yield.
\end{abstract}

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%\begin{eqnletter}
 %\label{e.all}
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 %                    \tx{where\ } \sy{F} = \tx{Fermi}    \label{e.house}\\
 %\phi_i        & = & i\pi                                \label{e.phi}
%\end{eqnletter}

 
\section{Introduction}
The ITk hybrid pixel detector \cite{ITk-Pixel-TDR}
consists of multi-chip modules comprising approximately 10,000 planar sensors and 400 triplet 3D sensors, equipped with front-end chips developed within the RD53 collaboration.

To ensure optimal performance and long-term reliability in the harsh environment of the HL-LHC  \cite{HL-LHC}, rigorous quality certification is mandatory for all the embedded components \cite{ATLAS-ITk-Pixel}\cite{AT2-IP-QA-014}.
In particular, this involves the test of the flexible printed circuit board (hereafter referred to as the \emph{flex}), as it provides the electrical interconnection between the ASICs and the external systems. 

The flexes are manufactured and populated adopting the highest reliability industrial standards. 
However, a standardised post-production quality control (QC) protocol allows  to detect defects before the module assembly, maximizing the yield. 
This involves a detailed visual inspection, metrology cross-checks, and exhaustive electrical tests, which are carried out both prior to and following the soldering of the SMD components \cite{AT2-IP-ES-0009}. About 10$\%$ of the flexes will be certified at the INFN Section in Lecce.


\section{The Flexible PCB}
Fig. \ref{fig:module}a shows the components of a quad pixel module and how they are assembled. 
Four front-end ASICs are bump bonded to a planar pixel sensor and a flex circuit (in fig. \ref{fig:module}b) is glued
on top of the sensor back-plane. The front-end chips are wire-bonded to the flex by aluminum wires of 25 $\mu$m of diameter.



The key specifications that the flexes must meet are listed below:

\begin{itemize}
\item 
The dimensions and reference hole positions must comply with design tolerances.
\item
The wire-bonding pads must be free of scratches or lithographic over-etching.
\item
The power dissipated by the supply planes must be less than 10$\%$ of the overall module power consumption.
\item
The leakage current of the high voltage (HV) rails and relative bypass capacitor must be negligible.
\item
The transmission lines must have a characteristic impedance of 100 $\pm$ 10 $\Omega$.
\end{itemize}

The bare flexes are produced by three different manufacturers: NCAB (SE), TECNOMEC (IT), and YAMASCHITA (JPN) on a panel including four units. The panels are subjected to a preliminary inspection. Those passing the control successfully are later populated by one the companies: NORBIT (NOR), G-O (UK), and HR (JPN).

After the soldering, the flexes are separated from the panels by cutting the supporting tabs (a total of 12 incisions). This is performed at the flex QC sites, under microscope supervision, by adopting a surgical scalpel with a round blade, which is often replaced for an optimal result. A disposable square frame is kept on the single flex PCB (visible in fig. \ref{fig:module}b) to provide mechanical support in the successive processes. It is later removed by cutting its tabs right before the module gluing. 

\begin{figure} %  figure placement: here, top, bottom, or page
   \centering
   \includegraphics[width=\textwidth]{quadmodule_and_flex} 
   \caption{a) Assembly of an ATLAS ITk pixel module. b) Detail of the flex PCB.}
   \label{fig:module}
\end{figure}

\section{Visual Inspection}
The flexes are carefully inspected under a microscope both before and after component population. High-resolution images of the SMD layer are acquired and stored in a database. In contrast, data from the back layer are recorded only if severe degradation is reported, as this layer is less frequently affected by issues.
At INFN Lecce, an automated acquisition procedure is used to perform an XY scan, capturing a total of 26 images per flex. These images are then stitched together using a set of scripts to produce a single wide-field image (approximately 9 MB in size).

Afterward, an evaluation form is filled with scores ranging from 1 to 3 (good, usable, to be rejected), which are related to each of the desired features. In particular, the main defects that need to be identified are listed here:

\begin{itemize}
\item
Over-etched wire-bonding pads
\item 
Coating scratches 
\item
Solder-Mask defects
\item
Non-Conformal fiducial marks
\item
Silkscreen resolution
\item
Component misalignment
\item
Solder spill
\item
Solder flux spill
\item
Stain
\item
Watermarks
\end{itemize} 

So far, visual inspection is supervised by an operator and takes approximately 10 minutes per flex. AI-driven software for defect identification has been explored by the collaboration. However, these solutions are not yet sufficiently mature to meet the stringent requirements of the application. This is not surprising due to the vast repertoire of possible issues and the variability in imaging conditions, such as microscope performance or illumination, which can significantly affect their appearance.

Finally, this activity has contributed to optimise the technological process and to improve soldering quality, thanks to active report exchanges with manufacturers and multiple iterations of prototype productions.

\section{Low and High Voltage Tests}
In order to minimise the material budget for cabling and related power loss, a serial supply chain is adopted throughout the ITk detectors. In such a way, multiple pixel modules can be powered in series by a constant current source, while a parallel structure is adopted only for the high-voltage biasing. Thus, it is essential to ensure that powering rails present a limited voltage drop and the high-voltage rail and its bypassing capacitors are not affected by excessive leakage. Finally, the characteristics of the embedded temperature sensor are monitored, as it represents a critical component for local monitoring and the prevention of thermal runaway.

In order to perform the electrical validation, test points are available on the flexes. They are contacted by a set of cards designed by the collaboration, a pogo pin card, signal conditioning and readout electronics, based on the PicoLog commercial device.

During the electrical QC tests, named HV-LV tests, the flex is sandwiched between a ground plane and the pogo pin card. The pogo pin card is then plugged in the flex power connector (see Fig. \ref{fig:HVLVsetup}b) and its pins are contacted with the flex test pads. This operation is mechanically guided by precision pillars placed on the ground plane and dowel holes on the flex and pogo pin card. An interfacing circuit amplifies and measures voltages and currents from the pogo pin card, which are then acquired by the PicoLog device and stored on a computer.

The architecture of the test-bench is reported in Fig. \ref{fig:HVLVsetup}a and it has been recently upgraded to support the concurrent analysis of 4 flexes (see  Fig. \ref{fig:HVLVsetup}c).
The following quantities are registered for each module and averaged in 20 minutes, to ensure the stability of results.

\begin{enumerate}
\item 
Electrical resistance of the power supply rails (VCC and GND).
\item 
Leakage current of the high-voltage rail and related bypass capacitor at -975 V.
\item 
Electrical resistance of the NTC temperature sensor.
\end{enumerate}

\begin{figure} %  figure placement: here, top, bottom, or page
   \centering
    \includegraphics[width=4.5in]{HVLVsetup} 
   \caption{a) Architecture of the HV-LV test-bench. b) A flex placed on the ground plane PCB, just before applying the pogo pin card. c) The setup allowing concurrent testing of four modules.}
   \label{fig:HVLVsetup}
\end{figure}


\begin{figure} %  figure placement: here, top, bottom, or page
   \centering
   \includegraphics[width=3in]{thickness} 
   \caption{a) Stack-up testing layout. b) Flex stack-up. c) Caliper-based measurement setup.}
   \label{fig:thickness}
\end{figure}

\section{Metrology}
Different mechanical metrology measurements are carried out on the bare and populated flexes. We report here only the most relevant ones. 

The stack-up validation is performed by using a precision caliper (see Fig. \ref{fig:thickness}c) which measures the PCB thickness at different regions. The evaluation of the single layer thickness is achieved by subtraction, exploiting specific layout features (Fig. \ref{fig:thickness}a) which are etched on the flex frame for the goals. In Fig. \ref{fig:thickness}b the design flex TECNOMEC stack-up is reported. The 10$\%$ of the flexes of each batch is checked with this procedure before the component population. 

Another relevant check consists in Go-No-Go jigs milled into the aluminum, which reflects the 3D profile of the full PCB and soldered components. This is specifically aimed to verify
the correct position and height of components (Fig. \ref{fig:GoNoGo}a) and to validate the flex dowel holes (see Fig. \ref{fig:GoNoGo}b). 
  
\begin{figure} %  figure placement: here, top, bottom, or page
   \centering
   \includegraphics[width=4in]{GoNoGo} 
   \caption{a) Validation jig. b) Check of the dowel hole positions.}
   \label{fig:GoNoGo}
\end{figure}


\section{Conclusions}
The quality certification of both bare and populated flexes has proven to be essential for maximising the production yield of the ATLAS ITk pixel modules and preventing schedule delays. Thanks to validated and standardised procedures, complete certification of a flex can be performed in approximately 35 minutes at the INFN facility in Lecce, with an average throughput of 40 flexes analyzed per week. To date, the collaboration has produced 318 pre-production flexes for the pixel inner system, along with 795 pre-production and 970 production flexes for the outer system.

\begin{thebibliography}{0}
%\bibitem{ref:apo} \BY{Einstein A. \atque Fermi E.}
% \IN{Phys. Rev. A}{13}{1999}{12};
%\SAME{69}{999}{1666}.
%\bibitem{ref:pul} \BY{Newton I.}
 %preprint INFN 8181.
%\bibitem{ref:bra} \BY{Bragg~B.}
 %\TITLE{Complete Works}, in \TITLE{Workers Playtime}, edited by \NAME{Tizio A. \atque Caio B.} (Unexeditor, Bologna) 1997, pp.~1-10.

\bibitem{ITk-Pixel-TDR}
\TITLE{Technical Design Report for the ATLAS Inner Tracker Pixel Detector}. 
CERN-LHCC-2017-021, ATLAS-TDR-030.


\bibitem{HL-LHC}
\TITLE{The High Luminosity LHC Project}. 
Available at https://hilumilhc.web.cern.ch/ (2022/09/15).

\bibitem{ATLAS-ITk-Pixel}
\TITLE{Technical Specification for ITk Pixel Modules}.
(AT2-IP-ES-0009).


\bibitem{AT2-IP-QA-014}
\TITLE{Production Flow and QA/QC of Module Flex PCB}.
(AT2-IP-QA-014).


\bibitem{AT2-IP-ES-0009}
 \TITLE{QA/QC procedures for the ITk Pixel Flex PCB}.
(AT2-IP-AP-0009).

\end{thebibliography}

\end{document}
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%% End of file `cimsmple.tex'.
