- Assay results and requests
- Chips for VETO are being prepared for ICPMS
- Connectors have been assayed (HPGe). Waiting report.
- FEP and cables received, to be assayed next.
- TPB to be sent there by Emma (Boulby).
- Inductors to be assayed soon.
- ESR: The XIA assay is given priority. 2 assays will be performed, one with a source to evaluate the build up of charge along the measurement, and one without it once the behaviour is understood.
- There's a note on the scintillation of ESR itself, which has not been studied yet.
VP: The report and the request for the TPB measurement are not in place.
- Discussion on the need of cleaning Pb-210 instead of Po-210. GZ says that, with the right procedure, you get rid of both.
- It is pointed out that when you measure Po-210 we assume it is in equilibrium with Pb-210. There is no way to evaluate Pb-210 on surface, since HPGe evaluates the bulk (it often is surface dominated, but not necessarily).
- OA mentions the possibility of covering the things that cannot be cleaned with parylene. It needs further investigation.
Exposure during Motherboard fabrication:
- AR says that NOA can be Rn free, but there's two caveats. We are not sure if it can be ready by the time of fabrication, and having more than 20 persons inside will introduce Rn, so Rn-free conditions might not be fulfilled anyway.
- The "active" exposure should be in the order of 1 week counting fabrication and testing. Active in the sense that the boards are being worked on.
- IMPORTANT: The storage of the Motherboards is not trivial and currently it is not foreseen in a Rn-free environment.