25-26 February 2016
IUSS - Ferrara 1391
Europe/Rome timezone
“Power”, “cost” and “space” are three main limiting factors when scientists and engineers plan innovative computing platforms. In many scientific fields as well as in modern data-centers these limitations require to find disruptive solutions both at level of hardware and software to maximize computing throughput of high performance computing (HPC) systems within a given energy, monetary and/or volumetric budget. The use of accelerators, e.g. GPUs, co-Processors, FPGAs, and multi-core low-power CPUs and SoCs are attempts to address these issues, raising computational density and efficiency. Their use is increasingly becoming an effective option in HPC communities to optimize energy-to-solution and time-to-solution parameters. However, they have a great impact on software design at level of applications, compiler and runtime tools. This workshop aims to promote and encourage the exchange of experiences and knowledges in novel strategies related to mitigate power-issues and increase programmability of heterogeneous systems. We focus on analyzing and assessing new trends on low-power strategies including, hardware and software tools as well as algorithm-design, able to minimize the energy required to control and, when possible, increase efficiency of platforms for scientific computing.
Sponsored by:
With the contribution of:
INFN Mont-Blanc project UniFe

Dates: from 25 February 2016 08:15 to 26 February 2016 18:00
Timezone: Europe/Rome
Location: IUSS - Ferrara 1391
Via Scienze 41b
Room: 1
Additional info: Topics
  • low-power architectures (use and design)
  • platform design
  • accelerator computing
  • compiler and run-time tools
  • energy-aware programming and scheduling

Organizing Committee

Piero Altoe’

Filippo Mantovani

Fabio Schifano

Luca Tomassetti

For more information please contact us at cola-info_at_fe.infn.it